J-Trace PRO RISC-V

The J-Trace PRO RISC-V brings full streaming trace capability to the RISC-V ecosystem, supporting N-Trace BTM (Branch Trace Module) for non-intrusive instruction trace on RV32 and RV64 cores. As RISC-V adoption accelerates across automotive, industrial, and IoT applications, the ability to capture a complete, cycle-accurate execution history becomes critical for debugging complex firmware and validating real-time behavior, capabilities that printf debugging and breakpoints alone cannot deliver.

RISC-V Trace with N-Trace BTM

The RISC-V N-Trace specification defines a standardized branch trace interface that records every branch, jump, and exception taken by the processor. The J-Trace PRO RISC-V captures this trace data at up to 150 MHz trace clock and streams it continuously to the host over USB 3.0 SuperSpeed, providing unlimited trace depth for long-running capture sessions. This enables developers to reconstruct the exact execution path of their firmware after the fact, essential for diagnosing hard-to-reproduce timing bugs, stack overflows, and interrupt priority issues in RISC-V-based designs.

Code coverage and execution profiling derived from the trace stream support safety certification workflows under IEC 61508 and ISO 26262, providing hardware-based metrics without the need for software instrumentation that would alter timing behavior on the target.

Specifications

Feature	Specification
Download Speed	Up to 4 MB/s
Host Interface	USB 3.0 SuperSpeed + Gigabit Ethernet
Debug Interface	JTAG, SWD
Max Trace Clock	150 MHz
Max SWO Speed	100 MHz
Trace Protocol	RISC-V N-Trace BTM
Streaming Trace	Continuous over USB 3.0, unlimited depth
Code Coverage	MC/DC, branch, statement
Architectures	RISC-V (RV32, RV64)
Target Voltage	1.2 V to 5 V
Flash Breakpoints	Unlimited
RTT	Real-time terminal, bidirectional
Dimensions	123 x 68 x 30 mm
Weight	120 g
Power	USB-powered (max 400 mA)
IDE Compatibility	Embedded Studio, Ozone, Eclipse, VS Code

The J-Trace PRO RISC-V is the dedicated trace solution for teams developing on RISC-V silicon who need the same level of execution visibility and code coverage that Arm developers have relied on with J-Trace for over a decade.