SEGGER J-Link PLUS
Debug & TraceMid-range JTAG/SWD debug probe with 1 MB/s download speed, SWO trace, and unlimited flash breakpoints for professional Cortex-M development. India pricing and local support from GSAS.
Interface
JTAG/SWD, 15 MHz
Speed
1 MB/s download
Breakpoints
Unlimited flash
Trace
SWO (printf/event)
Architecture
Arm Cortex-M/A/R, RISC-V
Connectivity
USB
Overview
About J-Link PLUS
The J-Link PLUS is the fully licensed debug probe in SEGGER’s J-Link family, delivering the software bundle professional Cortex-M developers need without the premium of the PRO or ULTRA models. It belongs to a product line with more than 500,000 units shipped, which SEGGER describes as probably the most popular debug probe for Arm cores and the de-facto standard. With download speeds up to 1 MB/s, a 15 MHz JTAG/SWD clock, and SWO trace support, it strikes the ideal balance between capability and cost for teams building production-grade embedded firmware.
What separates the PLUS from the entry-level J-Link BASE is the included license bundle: J-Flash and J-Flash SPI for stand-alone flash programming (preinstalled on the probe itself), Unlimited Flash Breakpoints, the Ozone debugger and performance analyzer, monitor-mode debugging, and RDI support. Unlimited flash breakpoints eliminate the frustration of running out of hardware breakpoint registers during complex debugging sessions, while SWO trace provides lightweight printf-style and event output for real-time logging and profiling. The J-Link PLUS supports tens of thousands of devices across Arm Cortex-M, Cortex-A, Cortex-R, and RISC-V architectures, making it the go-to choice for engineering teams that work across multiple silicon vendors and product lines. For instruction (ETM) streaming trace and hardware code coverage, including MC/DC for safety certification, choose J-Trace PRO.
Features
| Feature | Specification |
|---|---|
| Download Speed | Up to 1 MB/s |
| Host Interface | USB 2.0 |
| Debug Interface | JTAG, SWD, cJTAG (15 MHz clock) |
| Target Voltage | 1.2 V to 5 V |
| Architectures | Arm Cortex-M/A/R, RISC-V |
| Device Support | 10,000+ microcontrollers |
| Flash Breakpoints | Unlimited (license included) |
| Included Licenses | J-Flash, J-Flash SPI, Ozone, Monitor Mode, RDI |
| RTT | Real-time terminal, bidirectional |
| SWO | Serial Wire Output trace (printf/event) |
| Instruction (ETM) Trace | Not supported, use J-Trace PRO |
| Support | 12 months SEGGER Basic Support included |
| IDE Compatibility | Embedded Studio, Keil MDK, IAR, Eclipse, VS Code |
Watch the SEGGER J-Link PLUS introduction
Compatible with all major IDEs including SEGGER Embedded Studio, Keil MDK, IAR Embedded Workbench, and Eclipse-based environments, the J-Link PLUS integrates into existing development workflows. GDB server support ensures that custom tooling and CI/CD pipeline integration are straightforward.
Buy J-Link PLUS in India from GSAS
The J-Link PLUS sits in the middle of the J-Link family: step down to the J-Link BASE if budget is the constraint, or step up to the J-Link ULTRA for 4 MB/s downloads and the J-Link PRO for Ethernet and remote debug. GSAS Micro Systems, an authorized engineering partner in India, offers the J-Link PLUS with competitive pricing and short lead times, INR invoicing, and support from field application engineers in Bengaluru, Hyderabad, Chennai, Pune, Mumbai, and Delhi NCR. Request a quote or buy from the GSAS store.
Blog
SEGGER Insights
Meet the GSAS Team at electronica India 2026, Stall H3.I45
electronica India 2026 opens on 16 September at BIEC Bengaluru. The GSAS team is on the floor all three days at Stall H3.I45, and this is who you will be talking to and what they can show you.
J-Link Is Now Validated by ST for StellarStudio
STMicroelectronics has fully validated SEGGER J-Link for StellarStudio, the IDE for its Stellar automotive MCU family, and put the probe into continuous validation at Le Mans. What that changes for the toolchain review on a Stellar programme, from GSAS, an authorized engineering partner for SEGGER in India.
An AI Agent That Drives the Debugger: SEGGER and Embedder Connect J-Link to the Loop
SEGGER has given an AI coding agent direct control of J-Link and J-Trace: flash, breakpoints, memory inspection and live RTT on real silicon. The loop only works if the probe can read target RAM while the core runs, and GSAS field engineers know exactly where that breaks first.
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Common questions about J-Link PLUS
What is the price of the SEGGER J-Link PLUS in India?
Does the J-Link PLUS support instruction trace?
Which architectures does the J-Link PLUS support?
What does the J-Link PLUS include that the J-Link BASE does not?
When is the J-Link PLUS the right choice over the BASE or the PRO?
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