Skip to main content
Statistical process control chart generated from FADOS VI curve test data

VI Curve Tracing for Statistical Process Control in Electronics Manufacturing

GSAS Engineering · · 7 min read

Beyond Pass/Fail: Using VI Data for Process Monitoring

Most VI curve testing is deployed as a binary pass/fail gate: the board either matches the golden reference within tolerance, or it does not. This is valuable, but it leaves significant diagnostic intelligence unused. The VI curve data collected during production testing contains process trend information that, when analyzed statistically, can detect manufacturing drift before defects occur.

This article describes how to use data from the FADOS MUX, the 100-Channel automated VI curve scanning system from ProT Ar-Ge, for statistical process control (SPC) in electronics manufacturing.

What VI Curves Reveal About Process Health

Every VI curve measurement captures the aggregate impedance of a circuit node. Changes in that impedance reflect changes in the components and connections that form that node. When the same test point is measured across hundreds or thousands of boards, the curve data forms a statistical population that reveals:

  • Solder quality trends: Increasing impedance scatter at BGA or fine-pitch QFP test points may indicate solder paste deposition drift, reflow profile changes, or paste aging
  • Component variation: Shifts in capacitor or resistor VI signatures across a production lot may indicate a component supplier change or incoming material variation
  • Assembly drift: Gradual impedance changes at specific test points can signal placement accuracy degradation, nozzle wear, or stencil clogging

Implementing SPC with FADOS Data

Step 1: Establish the Baseline

Run the FADOS MUX across a statistically meaningful sample of known-good boards, typically 30–50 boards from a stable production period. For each of the 96 test channels, the FADOS software records the VI curve. Extract a scalar metric from each curve for SPC tracking:

  • Impedance magnitude at a fixed frequency: the simplest metric, directly derived from the VI curve slope
  • Phase angle: distinguishes resistive from reactive deviations
  • Curve area: the enclosed area of the VI ellipse, sensitive to capacitance and ESR changes

Step 2: Calculate Control Limits

From the baseline dataset, calculate the mean and standard deviation for each test channel’s chosen metric. Set control limits using standard SPC practice:

  • Upper Control Limit (UCL): Mean + 3 sigma
  • Lower Control Limit (LCL): Mean - 3 sigma
  • Warning limits: Mean +/- 2 sigma

These control limits are specific to each test channel, a power rail test point has a different expected impedance range than a high-speed signal trace.

Step 3: Chart Production Data

As each production board passes through the FADOS MUX test station, plot the extracted metric for each channel on its respective control chart. Standard SPC rules apply:

  • Single point beyond control limits: Investigate immediately
  • Seven consecutive points on one side of the mean: Process drift, investigate
  • Trend of six consecutive increasing or decreasing points: Systematic drift, investigate
  • Two of three consecutive points beyond warning limits: Emerging shift, monitor closely

Step 4: Root Cause Investigation

When a control chart signals an out-of-control condition, the test channel identity provides direct diagnostic guidance:

  • Power rail channels drifting: Investigate solder paste volume at decoupling capacitor locations, check capacitor incoming quality
  • BGA channels showing increased scatter: Check reflow profile, inspect stencil condition, verify paste shelf life
  • Connector channels trending: Check component placement accuracy for connector pins
  • Widespread drift across multiple channels: Systemic issue, PCB fabrication change, new solder paste lot, reflow oven calibration drift

Practical Considerations for Indian EMS Facilities

Data Management

The FADOS software exports test data in standard formats suitable for import into SPC software or spreadsheet-based control charts. For facilities with MES integration, the data pipeline is: FADOS MUX → export file → MES database → SPC dashboard.

For smaller operations without dedicated SPC software, a structured spreadsheet approach works, extract the impedance metric per channel per board, calculate running statistics, and maintain control charts.

Test Station Calibration

For SPC data to be meaningful, the measurement system itself must be stable. Periodically run a reference board (a stable, gold-standard board stored specifically for calibration verification) through the MUX and verify that its measurements remain within expected limits. Any drift in the reference board’s readings indicates test system issues, probe wear, connector degradation, or MUX relay aging.

Operator Discipline

SPC requires consistent test execution. The board must seat correctly in the fixture every time, inconsistent contact pressure creates measurement noise that masks real process signals. Spring-loaded pogo pin fixtures with vacuum or mechanical hold-down provide the repeatability that SPC demands.

Connecting to Supplier Quality

When VI curve SPC data identifies incoming component variation as the root cause of drift, this data becomes a powerful tool for supplier quality discussions. Quantified impedance drift tied to specific component lots provides objective evidence for supplier corrective action requests.

The Business Case

For an EMS facility processing 500 boards per day through a FADOS MUX station, SPC analysis of VI curve data can:

  • Detect solder process drift before defect rates increase, avoiding scrap and rework costs
  • Identify component lot issues at incoming inspection, preventing contamination of production batches
  • Reduce defect escape rates by catching subtle deviations that pass simple pass/fail testing but indicate degraded assembly quality
  • Provide auditable process data for ISO 9001, IATF 16949, and AS9100 quality system requirements

Why Buy FADOS MUX from GSAS

GSAS Micro Systems is an authorized ProT Ar-Ge partner and ODM assembler. We support FADOS MUX deployments across India, from initial fixture design through SPC implementation, at our offices in Bengaluru, Hyderabad, Chennai, Pune, Mumbai, and Delhi NCR.

  • INR invoicing with GST-compliant documentation
  • Application engineering for SPC integration
  • Training for operators and quality engineers

Request a quote → · Book a demo →

Interested in ProT Ar-Ge tools?

Talk to our application engineers for personalized tool recommendations.

Stay in the Loop

Get monthly compliance updates, product insights, and engineering best practices delivered to your inbox.

Related Articles

Embedded engineering workstation in India, illustrating the debug, analysis and design steps where AI now runs inside the process, supported by GSAS
Industry Insights

AI Inside the Engineering Process: What Is Worth Automating, and What Still Needs an Engineer

Arm, SEGGER, Perforce and Siemens EDA have each put AI inside a step of the engineering process rather than on top of it: debug, remediation, design entry, inference on the part. GSAS sets out the position behind our coverage of each: which steps are now worth automating, and which keep a human because the cost of being wrong is a recall.

21 Sept 2026 · 11 min read
Embedded engineering bench in India, illustrating the hardware a developer can act on today, supported by GSAS
Technical Guides Arm

Arm's Agentic AI Push: What Indian Embedded Teams Can Actually Use Today

Arm has set out its platform strategy for the agentic era, putting inference everywhere it has compute. Indian embedded teams can start on that direction this quarter with the Cortex-M toolchain they already own: Helium, CMSIS-NN, Ethos-U and Vela, on boards you can order today.

13 Sept 2026 · 7 min read
Side by side comparison of a 10BASE-T1S multidrop mixing segment, one balanced pair with four nodes on short stubs and a termination at each end, against a point to point star of four separate links into switch ports, from GSAS Micro Systems India
Automotive Ethernet Automotive & Mobility

10BASE-T1S and PLCA: Multidrop Ethernet Explained

10BASE-T1S is the one member of the T1 single-pair Ethernet family that keeps a shared medium, and PLCA is the reconciliation sublayer that stops the nodes on it from colliding. This article covers what IEEE 802.3cg standardises, how the beacon and transmit opportunities schedule a cycle, the node count and segment length figures the OPEN Alliance interoperability test suite works to, and the failure modes that put a segment quietly back into contention while every link still looks up. Written by the GSAS Micro Systems engineering team in India for teams bringing up multidrop segments on the bench.

29 Aug 2026 · 12 min read