Tessent
IC VerificationDesign-for-test (DFT) insertion, ATPG, BIST, diagnosis, and silicon lifecycle management for automotive and high-reliability ICs. Available in India from GSAS.
DFT
Scan chain insertion, wrapper, and compression
ATPG
Automatic test pattern generation with fault simulation
BIST
Memory BIST, logic BIST, I/O BIST
Diagnosis
Volume diagnosis and yield learning
Safety
ISO 26262 ASIL D in-system test and monitoring
SLM
Silicon lifecycle management (in-field monitoring)
Overview
About Tessent
![]()
Tessent from Siemens EDA is the industry’s most comprehensive platform for design-for-test (DFT), production test, diagnosis, and silicon lifecycle management. It spans the full IC test lifecycle, from DFT insertion during design, through test pattern generation for manufacturing, to in-field monitoring during the operational life of the chip. Tessent is the de facto standard for automotive ICs requiring ISO 26262 compliance and for any high-reliability application where silicon quality and in-field safety are non-negotiable.
The platform covers every aspect of IC test and quality. Tessent Shell provides unified DFT insertion including scan chain stitching, test compression, and wrapper architecture for hierarchical design. Tessent TestKompress generates highly compressed ATPG patterns that minimize test time and ATE memory while maintaining fault coverage. Tessent MemoryBIST and Tessent LogicBIST embed self-test controllers for on-chip testing without external ATE. Tessent Diagnosis analyzes production test failures to identify root-cause defect locations, enabling yield learning feedback to the foundry.
| Capability | Detail |
|---|---|
| Tessent Shell | Unified DFT insertion (scan, compression, wrapper) |
| Tessent TestKompress | Compressed ATPG with high fault coverage |
| Tessent MemoryBIST | Embedded memory self-test and repair |
| Tessent LogicBIST | Embedded logic self-test controller |
| Tessent Diagnosis | Volume diagnosis and yield learning |
| Tessent Safety | ISO 26262 in-system test (LBIST, MBIST at runtime) |
| Tessent SLM | Silicon lifecycle management (aging, degradation monitoring) |
| Boundary Scan | IEEE 1149.1 JTAG insertion and test |
For automotive IC teams, Tessent Safety provides the in-system test infrastructure that ISO 26262 requires for ASIL B through ASIL D functional safety, periodic LBIST and MBIST execution during vehicle operation to detect latent faults. Tessent Silicon Lifecycle Management extends this capability beyond manufacturing test into the operational life of the chip, monitoring aging, thermal stress, and degradation in the field.
GSAS Micro Systems provides Tessent licensing and technical support for semiconductor design and test teams across India, with expertise in DFT flow integration, automotive safety compliance, and production test optimization.
Blog
Siemens EDA Insights
Siemens EDA EBS Expert Series: 6 Free PCB Design Webinars (Jul-Aug 2026)
Siemens EDA is running six free EBS Expert Series webinars from 22 July to 27 August 2026, covering HyperLynx PI DC Drop analysis, Xpedition DRC, Xpedition EDM and PLM integration, EDX, and Starpoints/Tiebars net shorting. GSAS, the authorized Siemens EDA engineering partner in India, is highlighting all six for Indian PCB design teams.
AI Data Centers in India: Test, Measurement & Memory Boom
AI is a hardware supercycle. Every AI rack has to be designed, brought up, powered, fed with memory, and kept alive, and each of those is a test, measurement and memory problem. Here is the full engineering toolchain behind the AI data center, mapped to what Indian teams can buy today through GSAS.
AI and Intelligent Automation in PCB Design: How Siemens Xpedition Removes the Work That Slows Indian Teams Down
Siemens' own engineers describe a 'productivity paradox' in PCB design: the tools have never been more capable, yet throughput has not kept pace. This is how AI, intelligent automation, design reuse and connected data continuity in Xpedition Standard close that gap, and what it means for PCB design teams in Bengaluru, Pune, Chennai, Hyderabad, Mumbai and Delhi NCR.
Related products
More from Siemens EDA
All Siemens EDA products →
Innovator3D IC Layout
TSMC InFO-certified IC packaging layout tool for 2.5D/3D integration and advanced fan-out wafer-level packaging. Buy in India from GSAS with local support.
View Innovator3D IC Layout →
Xpedition Package Designer
IC package substrate and interposer layout for BGA, flip-chip, fan-out, and 2.5D/3D heterogeneous integration. Available in India from GSAS.
View Xpedition Package Designer →
Calibre
Industry-standard IC physical verification and signoff platform, DRC, LVS, parasitic extraction, and pattern matching for advanced-node tapeout. Available in India from GSAS.
View Calibre →FAQ
Common questions about Tessent
Does Tessent support ISO 26262 automotive safety requirements?
What is the difference between Tessent DFT insertion and Tessent Diagnosis?
Is Tessent available in India?
Interested in Tessent?
Get pricing, an evaluation unit, or a technical consultation from our application engineers.