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Digilent Basys 3 FPGA board with switches, LEDs, and seven-segment display

Digilent Basys 3: The Standard FPGA Board for Digital Logic Education in India

GSAS Engineering · · 5 min read

The Digilent Basys 3 occupies a specific and important position in the FPGA development board ecosystem: it is purpose-built for teaching digital logic and computer architecture. Every design decision, the choice of on-board peripherals, the I/O layout, the FPGA variant, serves the educational use case. This focus is why the Basys 3 has become the standard board for digital design courses at universities across India and worldwide.

Where the Arty A7 is a general-purpose FPGA development platform, the Basys 3 is a digital logic teaching platform. The distinction matters.

What Makes the Basys 3 Educational

16 slide switches connected directly to FPGA input pins. Each switch is a single-bit digital input, no debouncing required, no software driver needed. Students implementing combinational logic (adders, multiplexers, decoders) or sequential circuits (counters, state machines) map inputs directly to switches and see results immediately.

16 user LEDs connected directly to FPGA output pins. Each LED shows the state of one FPGA output. When a student implements a 4-bit adder and connects the sum outputs to LEDs 0-3 and the carry to LED 4, the result is visible without any additional debugging infrastructure.

5 push buttons for momentary inputs, clock signals, reset, and control inputs for sequential circuits.

4-digit 7-segment display with multiplexed drive. This is the first non-trivial interfacing exercise for most students: implementing the multiplexing logic that scans four digit positions rapidly enough to create the appearance of a static four-digit display. The 7-segment display also serves as the output for more complex projects, displaying counter values, state machine states, or ALU results in hexadecimal.

VGA output (12-bit colour) for graphics and display projects. Implementing a VGA controller, generating horizontal sync, vertical sync, and pixel colour signals at the correct timing, is a substantial project that teaches timing, counters, and state machine design. The 12-bit colour depth (4 bits per channel) enables meaningful visual output.

USB-JTAG and USB-UART built into the board. No external programmer needed, students connect a single USB cable to programme the FPGA and communicate via serial terminal.

The FPGA: Artix-7 35T

The Basys 3 uses the Xilinx Artix-7 XC7A35T, the same FPGA as the Arty A7 35T. With 33,280 logic cells, 1,800 Kb block RAM, and 90 DSP slices, it provides more than enough resources for educational projects:

  • Combinational circuits (adders, multiplexers, ALUs) use a tiny fraction of the logic cells
  • Sequential circuits (counters, shift registers, state machines) fit easily
  • Simple processors (single-cycle MIPS, RISC-V) fit within the 35T with room to spare
  • Signal processing projects (FIR filters, audio processing) use the DSP slices

The Basys 3 does not include external DDR memory (unlike the Arty A7), which keeps the board focused on FPGA logic design rather than memory interface design. For courses that need external memory access, the Arty A7 is the appropriate upgrade path.

The Indian Education Context

Digital logic and computer architecture courses are core requirements in virtually every electrical engineering, electronics engineering, and computer science programme at Indian universities. These courses have traditionally relied on breadboard experiments with discrete logic ICs (7400 series) or simulation-only approaches using HDL simulators.

The Basys 3 provides a better approach: students write VHDL or Verilog, synthesise it for a real FPGA, and see it run on physical hardware with physical inputs and outputs. The feedback loop, write code, synthesise, programme, test with switches and LEDs, builds the intuition for digital design that simulation alone cannot provide.

The cost-effectiveness of the Basys 3 makes it feasible for Indian universities to equip labs with one board per student (or at minimum, one per pair), rather than one shared setup per group of four or five. When every student has their own board, they can work at their own pace, experiment outside lab hours, and take the board home for project work.

Common Course Projects on the Basys 3

Semester 1, Combinational Logic:

  • 4-bit adder with carry chain (switches for inputs, LEDs for outputs)
  • 8-to-1 multiplexer
  • BCD-to-7-segment decoder (driving the on-board display)
  • ALU implementing add, subtract, AND, OR, XOR

Semester 2, Sequential Logic:

  • Modulo-N counter displayed on 7-segment display
  • Traffic light controller (state machine with LED outputs)
  • UART transmitter/receiver (USB-UART for PC communication)
  • VGA display controller with simple graphics

Advanced Projects:

  • Single-cycle MIPS processor executing a small instruction set
  • RISC-V RV32I soft processor
  • Digital audio processing (PWM output)
  • Game implementations (Pong, Snake) on VGA display

Pmod Expansion

Four Pmod connectors enable expansion beyond the on-board peripherals. Common Pmod additions for educational use:

  • PmodDA2 (DAC), analog output for signal generation projects
  • PmodAD1 (ADC), analog input for data acquisition projects
  • PmodOLED: OLED display for text and graphics
  • PmodBT2: Bluetooth for wireless communication projects

Why Buy from GSAS

GSAS is an authorized partner in India, providing the Basys 3 with INR invoicing, GST-compliant billing, educational volume pricing, and local stock. We support universities and training institutions across Bengaluru, Hyderabad, Chennai, Pune, Mumbai, Delhi NCR, and Visakhapatnam with procurement, lab setup guidance, and technical support.

Explore Basys 3 → | Contact for Educational Pricing →

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