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Left to right continuous integration pipeline from commit through build and a software-in-the-loop gate into a bench queue with a reservation gate, then a hardware-in-the-loop run and a report, showing the HIL bench as a shared queued resource, from GSAS Micro Systems India

Test Automation for SDV: ASAM XIL, Virtual ECUs, CI for HIL

GSAS Engineering · · 13 min read

Test automation for software-defined vehicles keeps one test case running across desktop simulation, virtual ECUs and hardware-in-the-loop benches. ASAM XIL is the public API standard that makes this possible: ASAM describes it as an API standard enabling communication between test automation tools and test benches, supporting model-in-the-loop, software-in-the-loop and hardware-in-the-loop stages, and states that it decouples test cases from real and virtual test systems. FMI supplies the other half, a free standard defining a container and an interface to exchange dynamic simulation models, distributed as a ZIP file, so plant models move between tools instead of being rebuilt. What does not move left is physical layer behaviour, time error measured at the pin, accredited conformance evidence and real electrical fault reaction.

The first automated test on a software-defined vehicle programme is easy. Someone writes a script, points it at a bench, and it passes. The problem arrives eight months later, when there are four benches, two simulation environments, three hundred test cases and a merge queue, and every case was written against whatever interface its author had in front of them.

This article covers the two public standards that let one test case survive the move from a laptop to a virtual ECU to a bench, the ladder those targets sit on, and what it takes to run a bench inside continuous integration. Our domain versus zonal explainer and our walkthrough of a vehicle communication architecture describe the network the bench reproduces.

What software-defined vehicle programmes change about testing

Release cadence moves from milestones to continuous integration

On a classical programme, integration is an event: software arrives at a sample gate, a team runs a campaign, defects come back, and the cycle repeats before start of production. When software keeps changing after the vehicle is in the field, that breaks. Automation becomes a gate on every change, so it must run unattended and return a verdict a merge decision can rest on, inside the window a developer will wait.

Bench time becomes the scarce resource, so tests must be portable and unattended

Gate every change and executions per week rise sharply, moving the constraint from engineer hours to bench hours. Two levers exist: buy more benches, which is slow and scales badly, or move every test that does not need the bench off it. Both need a case that can execute against more than one target.

The goal: the same test case, three execution targets

One case, written once, running against a desktop simulation, a virtual ECU with simulated peers, and real hardware, with the same pass criteria and result format. A case that measures a voltage never will, but the band checking behaviour, sequence and state holds most of the volume. That needs an interface between the case and whatever executes it.

ASAM XIL, in one page

An API standard between test automation tools and test benches

ASAM’s description is short enough to quote: XIL is “an API standard enabling communication between test automation tools and test benches”, it “supports all stages of development and testing, including model-in-the-loop (MIL), software-in-the-loop (SIL), and hardware-in-the-loop (HIL)”, and it “decouples test cases from real and virtual test systems, enabling easy transfer and reuse of tests across different systems with minimal migration”.

Test-bench access and model access, and why the second one is what makes tests portable

ASAM names two key components, the Framework and the Testbench, and lists the Testbench ports: Model Access, ECU Access, Diagnostic Access, Electrical Error Simulation, Network Access and Service-Oriented Access. Because the ports are named by the standard rather than by a product, a case written against them says what it does, not which tool it does it with. Model access matters most for shift-left, because the same variable exists in all three environments.

What portability actually buys, and what still has to be rewritten

A standard API makes the calls portable, not the case target-independent. Variable paths still change with the model, so real portability needs a naming layer with one mapping file per target: small work early, large work late. Timing assumptions change too, so write criteria against events and states, and mark timing-bound cases bench-only.

Where the model access companion standard fits

ASAM also publishes XIL-MA, “an extract from ASAM XIL” containing “the model access port specification as well as some common functionality from this standard”. XIL-MA tools “are fully compatible to ASAM XIL compliant tools, but have only the functionality of the model access port”, while full XIL “provides more ports for measurement, calibration, diagnostics, network access and electrical error simulation”. On a bench-automation project that difference is most of what you wanted, so establish which a supplier means.

Virtual ECUs and FMI packaged models

What a virtual ECU is, and the levels of virtualisation you will see described

A virtual ECU is the ECU’s software running on a host computer instead of the production microcontroller, with whatever it expects from hardware supplied by models. Level taxonomies circulate, mostly one vendor’s property, so learn the axis rather than the label. At low fidelity only application code is compiled for the host and everything below it is stubbed. Higher up, more of the real basic software is included and peripherals are modelled, so scheduling, communication stacks and diagnostic handling come under test. At the top, the production binary runs unmodified on an instruction-set simulator of the target core. More real software means slower execution, so a merge gate wants the fast end.

FMI and the FMU package, the interchange format that lets plant models move between tools

The plant model usually comes from another team’s tool, and FMI exists so it is not rewritten. The FMI project describes the Functional Mock-up Interface as “a free standard that defines a container and an interface to exchange dynamic simulation models using a combination of XML files, binaries and C code, distributed as a ZIP file”. That ZIP file is the Functional Mock-up Unit: a modelDescription.xml declaring variables and capabilities, binaries for the platforms the exporter supported, optional C sources, and a resources directory.

FMI 3.0 defines three interface types, and the third matters on a bench. Model Exchange exposes the equations and leaves integration to the importing tool’s solver; Co-Simulation packages a solver inside the FMU and steps it at communication points; Scheduled Execution exposes model partitions so an external scheduler can run each one, which the specification gives as a real-time platform case. Settle which one your exporter produces before the model is written.

What a virtual ECU genuinely proves about application logic

This rung combines production software with parallel execution the bench cannot offer: many variants run at once on a build farm, and a failing case re-runs deterministically under a debugger. Service-oriented behaviour belongs here, since a service that never appears, a refused subscription or a peer that restarts is all application logic. Our article on debugging SOME/IP service discovery lists the modes worth automating, as does our response pending and P2 timeout explainer.

What it cannot prove: physical layer, real timing, real faults

Three hard limits, taken up again at the end of this article. A virtual link always trains. Host timing is not target timing. And a model of a wire does not behave like a cut wire.

The shift-left ladder

Stage, coverage and cost, on one page

StageWhat runsWhat it catchesWhat it cannot catchCycle time, illustrative
Desktop simulation, unit and integration testApplication code plus stubsLogic defects, interface misuse, coverage gapsReal stack, network, hardwareSeconds to minutes
Software in the loopProduction software on a host, plant and peer modelsService discovery, diagnostics, error handlingPhysical layer, target timing, faultsMinutes to tens of minutes
Hardware in the loopProduction binary, real silicon, real links, fault hardwareTiming on target, link behaviour, fault reaction, wake and sleepEmergent behaviour, harness routing, EMCTens of minutes to hours, plus queue
Vehicle and fleetThe complete vehicleEmergent interactions, EMC reality, real usageAlmost nothing, at the highest costDays to weeks

Those cycle times are orders of magnitude for a planning conversation, not measurements: wrong in the specifics, roughly right in the ratios. The ratios are the argument, because each rung down costs materially more per execution.

Desktop simulation and unit or integration test

The top rung is unit and integration test tooling, a different discipline with its own toolchain and team. Our ISO 26262 page notes that statement, branch and modified condition/decision coverage sit at unit level among the verification methods the standard lists, so a coverage obligation lands here and nowhere else.

Software in the loop with virtual ECUs and simulated peers

The device under test needs a plausible network, not a message source: services offered and withdrawn, subscriptions that can be refused, peers that restart. Our article on rest bus simulation for Ethernet-based vehicles sets out the fidelity ladder, and where a simulator that is too perfect stops being a valid peer.

This is where fault behaviour becomes testable for real, which our companion article on fault injection in HIL benches treats as a design problem. That ASAM XIL names an Electrical Error Simulation port tells you fault injection was understood as part of bench automation.

Vehicle and fleet, and what only survives there

The bottom rung catches what no bench models: harness routing, the real electromagnetic and thermal environment, and user behaviour nobody wrote a requirement for. Everything above it exists so that what it finds is genuinely emergent.

Continuous integration for HIL, practically

The bench as a queued shared resource: reservation, setup, teardown, known-good baseline

A bench is a queue with one server, not an agent in a pool. Every job acquires a reservation the pipeline enforces; a booking spreadsheet fails the first time two people merge in the same hour. Setup brings the bench to a defined baseline: known images on every peer device, known model version, known network configuration, links verified up before the first case runs. Teardown restores that baseline and releases the reservation, and must run even when the job crashes, because a leaked reservation blocks the queue and a blocked queue is how HIL leaves CI. A bench starting from whatever the last run left behind gives order-dependent results.

Making a bench run deterministic enough to gate a merge

A merge gate has one hard requirement: a failure must mean the change is bad, or engineers learn to ignore red and the gate becomes decorative. Pin everything not under test, including peer software versions, model versions and switch configuration, so one thing varies between runs. Check preconditions explicitly and fail fast with a distinct status, so a bench that came up wrong reports “bench not ready” rather than “test failed”. Write pass criteria against observable events, and keep out of the gate any test whose result legitimately varies.

Flake triage: distinguishing a real regression from a bench artefact

Every intermittent failure has a cause, and the triage question is whether it lives in the device under test or in the bench. Answering that afterwards means having captured enough at the time: the network capture, the bench’s state log, the versions loaded, and timestamps to correlate them. Our guide to correlating captures across CAN, LIN, FlexRay and Ethernet covers correlation, and our taps and mirror ports guide covers capturing without changing what you measure.

Then classify rather than retry. A failure whose signature tracks the software version is a regression; one that tracks the bench, the slot or the preceding test is a bench defect, ticketed as seriously as a product defect. The habit that destroys a suite is the blanket automatic retry, because it turns a genuine intermittent product defect into a green result.

Which suites gate a pull request, which run nightly, which run before a release

Tier by cost and blast radius. A pull request gate should be fast, run mostly above the bench, and hold only deterministic cases a change could plausibly break: unit and integration tests, a virtual ECU smoke suite, and a small bench suite over the paths that break most often, typically startup, link-up, service availability and basic diagnostics. Nightly carries the bulk of the bench suite and the cases that take real time, including the sleep and wake behaviour our TC10 article describes; it can afford some non-determinism, since its output is a defect list. Pre-release runs everything. Publish the tiering, or it is re-litigated every sprint.

Bench configuration held as version-controlled code

None of this survives if the bench’s configuration lives in a GUI and an engineer’s memory. Switch configuration, VLAN and priority assignment, addressing, peer software versions, model versions and the wiring map belong in text beside the test cases, applied by setup and verified rather than assumed. A result from three months ago is then re-creatable from its commit, bench changes become reviewable, which is what stops four identical benches quietly ceasing to be identical, and a new bench is provisioned by applying a file.

Results, traceability and evidence

Requirement to test case to result, and why it is easier to build in than to retrofit

This chain is cheap while there are ten cases and expensive once there are three hundred across three targets. Put the requirement identifier in the test case source, carry it into the machine-readable result, and store it in the artefact bundle, so it travels with the case rather than the tool. Our ISO 26262 page notes that the strongest rating the standard applies to any method is “highly recommended” rather than mandatory, and that a chosen combination needs a rationale. What is wanted is a defensible chain, not a tool that claims to produce compliance.

Storing captures with results so a failure can be diagnosed weeks later

A verdict without evidence is unusable once the bench has moved on. Store captures with the result, not in a share someone will tidy up, and set retention deliberately: failures kept long, passes kept briefly or sampled, and a manifest of what was kept, so a later reader can tell a missing capture from a quiet one.

Reporting formats that survive a tool change

Emit results in a machine-readable format no single supplier owns, and treat a vendor report as a rendering of it. If the tool were replaced next quarter, would two years of results still be readable and comparable? If not, they are hostage to a licence.

What does not move left

Four categories resist virtualisation, and a plan that pretends otherwise fails late, which is the worst time.

A modelled link always comes up. A real one does not, and the reasons are wiring, PHY configuration, master and slave role configuration and signal quality, which our 100BASE-T1 link-up checklist works through step by step. None of that is reachable from a virtual ECU: there is no wire to be wrong.

Time synchronisation measured at the pin

A virtual environment can prove the time synchronisation state machine behaves. It cannot produce the number an OEM asks for, because that is a time error measured against a reference outside the device over a stated observation window, as our article on validating 802.1AS sets out. A device’s reported offset comes from the timestamps its servo steers with, so it cannot see errors common to both.

Conformance and interoperability evidence

Protocol behaviour can be pre-tested in-house. The report cannot be. As our conformance article explains, the accredited half needs calibrated fixtures, traceable instrumentation and a validated reference system behind every implemented test case, and test houses must hold accreditation and be neutral from the supply chain. In-house pre-compliance produces a defect list, not a report.

Electrical fault reaction

An open circuit, a short to battery and a short to ground have consequences at the PHY and at the supply that a model does not reproduce. Making the fault takes hardware, which is why fault-insertion units exist as a market category, and it belongs on the bench. Scripted protocol-level faults do move left, since crafted and out-of-specification frames can be generated against a virtual ECU with tooling such as Scapy. The electrical half stays.

Building the toolchain without locking yourself in

What to test during evaluation, not after the purchase order

CriterionWhy it mattersHow to test it during evaluation
Standard API support, and which portsDecides whether cases outlive the toolAsk which ASAM XIL ports are implemented, at which version, then run a case through them
Headless operationA tool needing a GUI cannot be a CI jobRun a suite from a command line, no display, clean checkout
Machine-readable results and exit codesThe pipeline decides from these, not a PDFConfirm the exit code separates pass, fail and infrastructure error; parse the file yourself
Model import pathDecides whether plant models are portableImport an FMU your simulation team exported; check the FMI interface type
Configuration as textEnables version control and reviewExport a bench configuration, diff two benches, re-import on a third
Behaviour under parallelismCI multiplies concurrent executionsRun as many simultaneous sessions as the pipeline will need

Standard API support versus a proprietary scripting layer

Most tools offer both, and the proprietary layer is usually nicer to write. That is the trap, because the nicer layer is where the lock-in lives. Allow it only inside a thin adapter the cases call through, so a rewrite touches one file.

Headless operation, exit codes and machine-readable results

Verify these yourself, because “supports command line execution” and “runs a full suite unattended with no display and returns a distinguishable exit code” are different claims.

Model import path, and who owns the plant models

Decide early who owns the plant model, which tool authors it, and which FMI interface type it exports as, because a model authored without a real-time export path becomes a rewrite at the bench.

Migration cost when one tool in the chain is replaced

The useful question is not whether you will replace a tool but what it would cost if you did. Walk it through separately for the automation tool, the simulation environment and the bench hardware. Where everything would be rewritten, insist on a standard interface; where only a mapping file changes, the lock-in is contained.

Where GSAS fits

Most of the difficulty here is not the standards. It is working out which rung of the ladder your defects sit on, and therefore which problem is worth money. A team losing weeks to service discovery defects needs better software-in-the-loop coverage and a more honest peer model. A team losing weeks to bench queueing needs suite tiering, not another bench. Different purchases, and the wrong one is expensive.

GSAS is an engineering partner, and the useful first conversation is a review rather than a quotation: what your suites cover, where they execute, which failures are regressions and which are bench artefacts, and where a standard interface would remove a real constraint. Our applications engineers work with teams in Bengaluru, Pune, Chennai and Hyderabad, mostly on benches that already exist. We also work on unit and integration test tooling, which is the top rung of the ladder and a different discipline; the two are not substitutes.

To scope that conversation, our automotive Ethernet capabilities page sets out where we work, and a note through request a quote reaches the applications team. Tell us your cycle time and where the queue forms, and we will start there.

References

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Frequently asked questions

What is ASAM XIL, and what problem does it solve?
ASAM describes XIL as an API standard enabling communication between test automation tools and test benches, supporting all stages of development and testing including model-in-the-loop, software-in-the-loop and hardware-in-the-loop. The problem it solves is the one every programme hits at the second bench: a test case written against one vendor's scripting layer is bound to that vendor's test system, so moving it to a different bench, or to a simulation environment, means rewriting it. ASAM states that the standard decouples test cases from real and virtual test systems, enabling easy transfer and reuse of tests across different systems with minimal migration. Its two key components are the Framework and the Testbench, and the Testbench exposes named ports, among them Model Access, ECU Access, Diagnostic Access, Electrical Error Simulation, Network Access and Service-Oriented Access.
What is a virtual ECU, and what can it realistically test?
A virtual ECU is the ECU's software executed on a host machine instead of the production microcontroller, with the hardware it depends on supplied by models. You will see it described at several levels of virtualisation, and the differences matter more than the labels: at one end only the application logic is compiled for the host and everything below it is stubbed, at the other end the production binary runs on an instruction-set simulator of the real core with peripheral models attached. The higher the level, the more of the real code is under test and the slower it runs. What a virtual ECU tests well is application behaviour: state machines, arbitration between features, service semantics, diagnostic sequences, calibration effects and reactions to plausible plant conditions. What it cannot test is anything whose truth lives in the silicon, the board or the wire.
What is the difference between FMI and FMU?
FMI is the standard and an FMU is a file produced against it. The FMI project describes the Functional Mock-up Interface as a free standard that defines a container and an interface to exchange dynamic simulation models using a combination of XML files, binaries and C code, distributed as a ZIP file. That ZIP file is the Functional Mock-up Unit. Inside it you find a modelDescription.xml that declares the variables and capabilities, compiled binaries for the platforms the exporter supported, optionally C sources for platforms it did not, and a resources directory for data the model needs. FMI 3.0 defines three interface types: Model Exchange, where the FMU exposes its equations and the importing tool supplies the solver; Co-Simulation, where the FMU carries its own solver and is stepped at communication points; and Scheduled Execution, where individual model partitions are exposed for an external scheduler, which the specification cites as a real-time platform case.
Can hardware-in-the-loop tests really run in a CI pipeline?
Yes, but not the way unit tests run in one. A HIL bench is a physical resource with a setup cost, a teardown cost and exactly one occupant at a time, so it behaves like a queue rather than like a pool of build agents. The pipeline pattern that works is to treat the bench as a reserved resource: the job requests it, waits, receives it in a known-good baseline state, runs, publishes artefacts, and releases it whether it passed or crashed. Three things make or break this. Reservation has to be enforced by the pipeline rather than by a booking sheet, or two jobs will eventually share a bench. Every run has to begin from a defined starting state rather than from whatever the last run left behind. And a job that dies has to release the bench, because a leaked reservation stops the whole queue and gets the pipeline switched off.
How do I stop HIL test results from being flaky enough to ignore?
Start by refusing to treat flake as a property of the bench. Every intermittent failure is either a real intermittent defect in the device under test, or a bench artefact with a physical cause, and the triage question is which. Give every run enough evidence to answer that later: a full capture of the network under test, the bench's own state log, the baseline versions of everything loaded, and the timestamps that let those be correlated. Then classify. Failures whose signature moves with the code under test are regressions. Failures that correlate with the bench, the slot, the ambient conditions or the previous run are bench artefacts, and they get a defect ticket against the bench rather than a retry. The one habit that destroys a HIL suite's credibility is a blanket automatic retry, because it converts a real intermittent defect into a green result.
What testing can be shifted left, and what has to stay on the bench?
Logic shifts left well. Physics does not. Anything you can decide by reading messages, states and computed values can usually be decided against a virtual ECU and simulated peers: service discovery behaviour, diagnostic sequences, application state machines, error handling, calibration effects. Four categories stay on real hardware. Physical layer behaviour and link quality, because a simulated link never fails to train. Time synchronisation accuracy, because the number that matters is a time error measured against a reference outside the device, not the device's own opinion of its offset. Conformance and interoperability evidence, because the report has to come from an accredited process with traceable instrumentation. And reaction to real electrical faults, because an open circuit and a short have consequences a model does not reproduce.
Do I need ASAM XIL support if I only use one vendor's tools?
The honest answer is that you need it for the situation you are not currently in. If every bench, every simulation environment and every automation script in the programme comes from one supplier and will for the life of the programme, a proprietary API works and works well. The value of the standard API appears at the second bench, the second simulation environment, the acquisition that brings a different toolchain into the group, or the customer who supplies their own test system and expects your suites to run on it. Treat it as an option you are buying rather than a feature you are using: the question to ask during evaluation is not whether the vendor claims ASAM XIL support but which ports are implemented, at which version, and whether a test case you wrote can be executed unchanged through the standard interface rather than through the vendor's own layer.
How do I keep test results traceable to requirements across three execution targets?
By making the identifier travel with the test case rather than with the tool. The requirement identifier belongs in the test case source, in the machine-readable result the run emits, and in the artefact bundle stored with it, so a result found two years later can be walked back to the requirement without consulting anyone. Doing this from the first suite is cheap; retrofitting it after three hundred test cases exist across three environments is a project. Our ISO 26262 page notes that the standard's strongest rating for any method is highly recommended rather than mandatory, and that structural coverage at unit level is among the verification methods it lists, so what an assessor typically wants is not a tool badge but a defensible chain from requirement to executed test to stored evidence, plus a rationale for the combination of methods you chose.

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