GSAS at DEF-TECH Bharat Bengaluru 2026

DEF-TECH Bharat Bengaluru 2026: 20–22 May 2026, KTPO Whitefield, Bengaluru Visit GSAS at Hall 2, Booth D27 Featured partner keynote: Shripathi V on “Simulation-Driven Hypersonic Vehicle Design”

Visitor registration is free via the official DEF-TECH Bharat warpbay form (use the Register Free as a Visitor button below). Booth meetings are 30-minute slots with a GSAS application engineer on your preferred day, request one via the Book a Meeting at Our Booth button.

GSAS Micro Systems is exhibiting at DEF-TECH Bharat Bengaluru 2026, India’s premier defence and aerospace technology trade show, co-located with the DefTech CON 2026 technical conference. We will be at Hall 2, Booth D27 for all three days, with our application-engineering team running live demos of the test-and-measurement, debug-and-trace, and software-development tools Indian defence and aerospace engineering programmes use to ship mission-critical systems.

Featured partner keynote: Shripathi V

GSAS is proud to highlight a keynote from one of our long-standing simulation partners, Shripathi V is presenting “Simulation-Driven Hypersonic Vehicle Design” at DEF-TECH Bharat 2026.

The talk is a state-of-the-field look at how modern multidisciplinary simulation, structures, fluids, thermal, controls, is being used to design next-generation hypersonic vehicles for Indian defence and aerospace programmes. Shripathi is affiliated with Hexagon’s MSC Software business (the simulation portfolio now part of Cadence Design Systems), and the talk reflects the ongoing convergence between simulation-led design and the systems-engineering disciplines GSAS supports on the embedded-tooling side.

If you are an Indian aerospace or defence engineering manager evaluating where simulation-driven design fits in your programme, and how the simulation outputs link to the firmware, software, and embedded-systems toolchain on the integration side, come to Shripathi’s session at DefTech CON, then walk over to Booth D27 to discuss the embedded-and-toolchain story with GSAS.

Image: speaker promotional banner shared by Shripathi V via LinkedIn for the DEF-TECH Bharat 2026 keynote.

Why this show matters in 2026

India’s defence manufacturing outlook for 2026 is defined by a strategic shift from intent to large-scale execution. Domestic production is projected to exceed ₹2 trillion, exports are targeting ₹30,000+ crore, and the ₹7.85 lakh crore defence budget for FY 2026–27 reserves roughly 75% of the capital acquisition fund for domestic industries (per the DEF-TECH Bharat industry briefing). 2026 is positioned as the “Year of Reforms”: focused on indigenous design and high-tech integration across automotive, aerospace, naval, electronic-warfare, and unmanned domains.

Three priorities dominate the 2026 technology agenda:

• AI-driven autonomous systems: swarm drones, stealth unmanned platforms, autonomous battlefield logistics.
• Hypersonic, missile, and quantum-secured communications: directly relevant to Shripathi V’s keynote topic above.
• GaN RF modules for next-generation radar (the ADITI 2.0 scheme has allocated ₹500 crore for critical technologies including this category).

For Indian defence and aerospace engineering teams turning these priorities into production firmware and hardware, the toolchain is where intent becomes execution, and where GSAS lives.

C4ISR, battlefield-management systems, and the conference programme

The co-located DefTech CON 2026 conference (21–22 May) hosts 20+ seminars on C4ISR (Command, Control, Communications, Computers, Intelligence, Surveillance, Reconnaissance), battlefield-management systems, indigenous defence-tech roadmaps, and simulation-driven design, including Shripathi V’s hypersonic-vehicle keynote.

Per the show’s own positioning, DEF-TECH Bharat is R&D-centric rather than equipment-display-only, focused on engineering and systems integration, directly connecting deep-tech startups with global supply chains.

What GSAS is demonstrating at Booth D27

The booth runs five thematic showcases across the three days, each mapped to a 2026 defence-and-aerospace technology priority, from safety-critical avionics firmware to PCB-level production assurance to pre-silicon SoC bring-up. Application engineers are on each station; bring your firmware, your safety case, your procurement timeline.

Showcase 1: Functional safety toolchain for avionics, missile, and vehicular electronics

The full software-side safety stack defence and aerospace programmes need to ship code that survives a tool-qualification audit, IEC 61508 SIL-3/SIL-4, ISO 26262 ASIL-D, EN 50716 (rail), IEC 62304 (medical Class C), and DO-178C / DO-330 (avionics).

• Arm Keil MDK Professional with the Arm Compiler for Embedded FuSa: the TÜV-certified safety compiler. Live demo of an MPU-isolated multi-thread safety-critical firmware on a Cortex-M33 board, with the Arm FuSa Run-Time System handling spatial isolation and thread watchdogs.
• Arm Development Studio: the IDE / debug / trace environment for Cortex-R and Cortex-A class avionics work, with multi-core debug and ETM/ETF/ETB trace decode.
• Arm Safety Qualification Kit: the evidence package (Safety Manual, Defect Report, Test Report, Development Process Report) Indian DPSU and private-prime programmes need for tool-qualification chains.
• Razorcat TESSY: automated dynamic unit, module, and integration testing for embedded C / C++ with MC/DC coverage. Qualified for ISO 26262, IEC 61508, and DO-178C, TESSY closes the loop between coded requirements and verified evidence in a way that maps cleanly to defence avionics and vehicular-electronics safety cases.
• Local License Server (LLS) for air-gapped programmes, the deployment model classified-network defence projects actually use. We walk visitors through standing up an LLS without outbound *.arm.com connectivity.

Showcase 2: Static analysis, MISRA conformance, and secure code for safety- and security-critical firmware

The static-analysis bench is the gate that stands between a working firmware build and a safety-case sign-off, and increasingly, between a working build and a defensible cyber-security posture.

• Perforce Helix QAC for MISRA C / MISRA C++ / CERT C / AUTOSAR C++14 conformance, the static-analysis tool that gates safety case sign-off for Indian Tier-1 ECU programmes and avionics flight-control firmware.
• Perforce Klocwork for security-focused static analysis, CWE Top 25, OWASP, ISO/SAE 21434 (automotive cyber-security), and the security side of the safety/security split. Directly relevant to defence programmes responding to indigenous cyber-resilience guidance for embedded systems and weapons-platform firmware.
• Initial Rust analysis support in QAC and Klocwork 2026.1, relevant for Indian teams piloting memory-safe Rust on weapon-system firmware, autonomous-platform middleware, and ground-control software. See our companion event Perforce Rust standards webinar for the broader context.

Showcase 3: Cortex-M and Cortex-R embedded stack for missile, UAV, and mission-data systems

The Cortex-M and Cortex-R production firmware stack, compilers, debug probes, RTOS, file system, GUI, and cryptography, that Indian defence and aerospace teams use to build missile flight-control units, UAV autopilots, EW signal-chain controllers, and secure mission-data recorders.

• Arm Keil MDK Professional + ULINKplus: the production toolchain for Cortex-M flight-control and mission-controller firmware, with current measurement, isolation, and energy profiling on the same probe.
• SEGGER J-Link PRO, J-Link PLUS, J-Link ULTRA, and J-Link BASE: the workhorse Cortex-M / Cortex-R / RISC-V debug probe family. The Ethernet-streaming J-Link PRO is the standard for distributed defence-firmware development teams across Bengaluru, Hyderabad, and Pune working a single target from multiple sites.
• SEGGER embOS: safety-certified RTOS with zero-interrupt-latency, sub-1 KB ROM footprint, and royalty-free licensing across Classic, MPU, Ultra, and Safe editions for missile flight-control, UAV autopilot, and avionics line-replaceable-unit firmware.
• SEGGER emFile: embedded file system with FAT12/16/32 + exFAT, journaling for power-fail safety, and wear-levelling for the NAND/NOR flash that lives inside mission-data recorders, black boxes, and EW signal-capture units.
• SEGGER emCrypt + emSecure: cryptographic library (AES, SHA-2/3, ECC, RSA, hardware acceleration) and digital-signature verification for secure boot, signed firmware updates, and rollback-protected over-the-air updates on fielded defence platforms.
• SEGGER emWin: embedded GUI library for cockpit displays, ground-control HMIs, and operator consoles. Royalty-free, with the AppWizard visual designer.
• SEGGER emCompress: modular DEFLATE / LZMA compression for telemetry, mission-data archival, and bandwidth-constrained tactical comms.
• SEGGER emModbus: lightweight Modbus RTU / ASCII / TCP stack for ground-support equipment, test fixtures, and industrial-control points on a defence supply chain.

Showcase 4: PCB design and production-test for defence-grade hardware

Mission-critical defence PCBs, RF / mixed-signal / harsh-environment, demand both a serious ECAD design environment upstream and a serious JTAG-based production-test discipline downstream. We bring both sides of that loop to Booth D27.

• Siemens Xpedition Enterprise: Siemens EDA’s next-generation enterprise PCB design platform: concurrent multi-user editing for distributed defence design centres, AI-infused design support, cloud-connected collaboration, and Teamcenter PLM integration. Directly applicable to RF / mixed-signal radar boards, GaN front-ends, EW receivers, and harsh-environment avionics PCBs being designed across the Indian DPSU and private-prime ecosystem.
• ProMik Boundary Scan Suite: IEEE 1149.1 JTAG boundary scan for automated solder-joint and interconnect fault detection on assembled defence PCBs. Pairs with ProMik flash-programming infrastructure (the ProMik MSP2100Net lab programmer is on the bench) to give defence-electronics manufacturers a single fixture pass that programs firmware, tests interconnects, and provisions secure-boot keys, exactly the kind of production-assurance discipline a defence-grade NPI needs before it ever leaves the line.

Showcase 5: Pre-silicon bring-up, virtual platforms, and simulation-driven design

The “shift-left” station, for SoC defence design centres, hypersonic-vehicle simulation teams, and any programme where firmware needs to be working before silicon arrives.

• Arm Fixed Virtual Platforms (FVPs) and Fast Models: software models of Cortex-M / Cortex-R / Cortex-A / Neoverse cores for pre-silicon firmware development, shift-left CI testing, and hardware-independent verification. Used heavily by Indian SoC design centres building indigenous defence-grade silicon.
• Arm MPS4 FPGA Prototyping Board: AMD Virtex UltraScale+ FPGA platform (3.8M LE) for Arm Corstone subsystems, with Cortex-A/R/M support, PCIe Gen 3, DDR4, FMC+, HDMI, MIPI, and on-board ULINKplus. The reference platform for next-gen Cortex-M / Cortex-A / Neoverse pre-silicon firmware bring-up at SoC defence design centres.
• Cadence simulation portfolio: multidisciplinary simulation (structures, fluids, thermal, controls) for hypersonic vehicles, missiles, and airframes. This is the stack behind our featured-partner keynote: catch Shripathi V at DefTech CON on “Simulation-Driven Hypersonic Vehicle Design”, then walk over to Booth D27 to discuss how simulation outputs link to the firmware, software, and embedded-systems toolchain on the integration side.

Also at the booth: test, measurement, and energy instrumentation

A working bench of the test-and-measurement instruments Indian defence-firmware and autonomous-systems teams use day to day:

• PicoScope mixed-signal oscilloscopes, automotive bus protocol decode, RF/IF capture for EW signal-chain analysis, power-electronics debugging.
• Joulescope precision energy and current measurement, the µA-to-A measurement instrument for battery-life budgeting on UAVs, loitering munitions, and unattended sensor platforms.

All five showcases have application engineers ready to take questions on integration into your specific programme, bring your firmware, bring your safety case, bring your procurement timeline; we will tell you exactly how this fits.

What to expect

The 2026 edition expects:

• 12,000+ visitors across three days
• 150+ exhibitors from 5+ technology-leading countries (97 confirmed at the time of writing)
• 750+ technologies displayed
• 20+ seminars at the co-located DefTech CON 2026 conference

For Indian defence and aerospace engineering managers, this is the highest-density single venue of the year for evaluating new tooling against new programme requirements.

Indian defence and aerospace audiences GSAS supports

GSAS Micro Systems has been the authorized engineering partner in India for the Arm tools family since 2018, with a portfolio that extends across Perforce static analysis, Pico Technology test-and-measurement, Joulescope precision energy measurement, SEGGER debug-and-trace, and the full GSAS product line.

For defence and aerospace specifically, our customer profile spans:

• Government defence R&D laboratories developing indigenous platforms across air, land, sea, and space.
• Space-sector organisations working on launcher avionics, spacecraft on-board computers, and satellite payloads.
• Defence public-sector undertakings (DPSUs) and the broader public-sector ecosystem on next-generation platforms.
• Private-industry primes and system integrators delivering Make-in-India programmes (per the DEF-TECH Bharat industry briefing audience profile).
• The deep-tech startup ecosystem in Bengaluru, Hyderabad, Chennai, Pune, and Delhi NCR building unmanned systems, EW, RF/microwave, autonomous logistics, and AI-driven defence systems.

Plan your visit

What	Detail
Dates	Tuesday 20 May – Thursday 22 May 2026
Venue	KTPO Whitefield, Bengaluru
GSAS Booth	Hall 2, Booth D27
Co-located conference	DefTech CON 2026-21 & 22 May
Featured partner keynote	Shripathi V, “Simulation-Driven Hypersonic Vehicle Design”
Best time to find us	All three days; recommend 11:00 IST – 16:00 IST for technical discussions
Pre-book a meeting slot	Contact GSAS, we will hold a 30-minute slot on your preferred day

Reserve your visitor pass → | Official DEF-TECH Bharat page → | GSAS exhibitor profile →

GSAS Micro Systems, Arm’s authorized engineering partner in India and a long-standing Arm tools partner in the country, operating across Bengaluru (HQ), Chennai, Hyderabad, Pune, Mumbai, Delhi NCR, and Visakhapatnam.

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Page imagery sourced from the official DEF-TECH Bharat 2026 marketing materials at deftechbharat.com (event-organizer banners, the C4ISR programme card, and the “what to expect” panel) and from a speaker promotional banner shared via LinkedIn by Shripathi V for his DefTech CON 2026 keynote on Simulation-Driven Hypersonic Vehicle Design.